1. Technical Field
The present disclosure relates to a semiconductor device.
2. Description of the Related Art
A DC-DC converter for use as a power supply circuit of a personal computer requires more and more current in order to drive a central processing unit at high speed.
A DC-DC converter is configured with a high side switch and a low side switch each using a power semiconductor. Then, by alternately turning on/off the high side switch and the low side switch in synchronization with each other, the DC-DC converter conducts voltage conversion. The high side switch is a control switch of the DC-DC converter and the low side switch is a synchronous rectification switch.
When a high side switch, a low side switch, and a gate driver which drives each of the switches are formed in one package, a parasitic inductance is generated due to wiring-bonding of a semiconductor device, or due to wirings of a printed circuit board of a package in which the components are mounted. In particular, when a main current flows to a parasitic inductance on a source terminal side of the high side switch, an induced electromotive force is generated. As a result, turn-on of the high side switch is delayed to invite a reduction in power conversion efficiency.
Additionally, there is also a concern that an increase in a parasitic inductance among a gate driver, a high side switch and a low side switch may cause a reduction in power conversion efficiency, i.e. an increase in loss.
Therefore, one technique proposed for improving power conversion efficiency of a DC-DC converter is to integrate a high side switch, a low side switch, and a gate driver which drives each of the switches in one chip, thereby reducing an effect of a parasitic inductance caused by wiring-bonding and a package (Patent Literature 1).
According to Patent Literature 1, by integrating each element in one chip, wirings and the like on a packaging board can be removed, thereby reducing the above-described parasitic inductance and reducing a module size.